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<title>cirsim, branch master</title>
<subtitle>My first attempt in circuit simulation</subtitle>
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<updated>2022-04-22T17:26:35Z</updated>
<entry>
<title>Eliminates unused code.</title>
<updated>2022-04-22T17:26:35Z</updated>
<author>
<name>Aleksey Veresov</name>
<email>aleksey@veresov.pro</email>
</author>
<published>2022-04-22T17:26:35Z</published>
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<entry>
<title>Splits logic and graphics.</title>
<updated>2022-04-22T17:25:47Z</updated>
<author>
<name>Aleksey Veresov</name>
<email>aleksey@veresov.pro</email>
</author>
<published>2022-04-22T17:25:47Z</published>
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<entry>
<title>Refactoring</title>
<updated>2022-04-21T15:10:12Z</updated>
<author>
<name>Aleksey Veresov</name>
<email>aleksey@veresov.pro</email>
</author>
<published>2022-04-21T15:10:12Z</published>
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<entry>
<title>.</title>
<updated>2022-04-19T02:25:30Z</updated>
<author>
<name>Aleksey Veresov</name>
<email>aleksey@veresov.pro</email>
</author>
<published>2022-04-19T02:25:30Z</published>
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