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author | Aleksey Veresov <aleksey@veresov.pro> | 2021-04-02 16:20:22 +0300 |
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committer | Aleksey Veresov <aleksey@veresov.pro> | 2021-04-02 16:20:22 +0300 |
commit | 958fe091c9969f61836a4f8011de614507c7743b (patch) | |
tree | 47ab82d9c4aa663d485651633f011ea37edd1c60 | |
parent | 884d530472c2edcc5dc5044dfc1f8f9e9b140b72 (diff) | |
download | suem-958fe091c9969f61836a4f8011de614507c7743b.tar suem-958fe091c9969f61836a4f8011de614507c7743b.tar.xz suem-958fe091c9969f61836a4f8011de614507c7743b.zip |
SP size correct processing is added.
-rw-r--r-- | src/Machine.hs | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/src/Machine.hs b/src/Machine.hs index 5962469..e17f468 100644 --- a/src/Machine.hs +++ b/src/Machine.hs @@ -105,8 +105,12 @@ readA 6 s = with ars $ \rs -> do (_,_,_,_,_,_,r) <- readIORef rs return $ convertLong r s readA 7 s = isSupervisor >>= \sup -> if sup - then with ssp $ \sp -> readIORef sp - else with usp $ \sp -> readIORef sp + then with ssp $ \sp -> do + v <- readIORef sp + return $ convertLong v s + else with usp $ \sp -> do + v <- readIORef sp + return $ convertLong v s readA _ _ = return $ error "Incorrect Address register read" @@ -160,8 +164,12 @@ writeA 6 s r = with ars $ \rs -> do (r0,r1,r2,r3,r4,r5,r6) <- readIORef rs writeIORef rs (r0,r1,r2,r3,r4,r5,combineLong r r6 s) writeA 7 s r = isSupervisor >>= \sup -> if sup - then with ssp $ \sp -> writeIORef sp r - else with usp $ \sp -> writeIORef sp r + then with ssp $ \sp -> do + v <- readIORef sp + writeIORef sp $ combineLong r v s + else with usp $ \sp -> do + v <- readIORef sp + writeIORef sp $ combineLong r v s writeA _ _ _ = return $ error "Incorrect Address register write" |