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author | Nikita Orlov <nikitf-97@mail.ru> | 2021-04-11 15:10:58 +0300 |
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committer | Nikita Orlov <nikitf-97@mail.ru> | 2021-04-11 15:10:58 +0300 |
commit | 0be6a61d0a819b057b43848632928a261021ed25 (patch) | |
tree | 2c6ca6a4fab0941cebf4e49484217172b16ed1bc /src | |
parent | b4605da3594b88f34087e4707e3129d98ff99ed6 (diff) | |
download | suem-0be6a61d0a819b057b43848632928a261021ed25.tar suem-0be6a61d0a819b057b43848632928a261021ed25.tar.xz suem-0be6a61d0a819b057b43848632928a261021ed25.zip |
Interrupts added
Diffstat (limited to 'src')
-rw-r--r-- | src/Instructions.hs | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/src/Instructions.hs b/src/Instructions.hs index 2d84597..893af76 100644 --- a/src/Instructions.hs +++ b/src/Instructions.hs @@ -5,6 +5,7 @@ import Prelude hiding (Word) import Machine import Control import Utils +import Data.Bits ((.&.)) import Data.IORef @@ -21,7 +22,14 @@ doANDICCR :: Emulator () doANDICCR = error "ANDICCR" doANDISR :: Emulator () -doANDISR = error "ANDISR" +doANDISR = do + incPC + (src_get, src_set) <- getOp 7 4 2 + src_val <- src_get + dst_val <- readSR + let value = (fromIntegral dst_val) .&. src_val + writeSR $ fromIntegral value +-- TODO flags doANDI :: Int -> Int -> Int -> Emulator () doANDI _ _ _ = error "ANDI" @@ -155,14 +163,20 @@ doSTOP :: Emulator () doSTOP = error "STOP" doRTE :: Emulator () -doRTE = error "RTE" +doRTE = do + sp <- readA 7 4 + writeA 7 4 (sp + 6) + sr <- getMemory sp 2 + writeSR $ fromIntegral sr + pc <- getMemory (sp + 2) 4 + writePC pc doRTS :: Emulator () doRTS = do sp <- readA 7 4 writeA 7 4 (sp + 4) - addr <- getMemory sp 4 - writePC addr + pc <- getMemory sp 4 + writePC pc doTRAPV :: Emulator () doTRAPV = error "TRAPV" @@ -388,3 +402,16 @@ doROXdR _ _ _ _ _ = error "ROXdR" doROdR :: Int -> Int -> Int -> Int -> Int -> Emulator () doROdR _ _ _ _ _ = error "ROdR" + +doInterrupt :: Emulator () +doInterrupt = do + pc <- readPC + ihandler <- getMemory 100 4 + writePC ihandler + sr <- readSR + setSupervisor True + setInterruptLevel 1 + sp <- readA 7 4 + writeA 7 4 (sp - 6) + setMemory (sp - 4) 4 pc + setMemory (sp - 6) 2 $ fromIntegral sr |