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author | Aleksey Veresov <aleksey@veresov.pro> | 2021-02-15 19:31:12 +0300 |
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committer | Aleksey Veresov <aleksey@veresov.pro> | 2021-02-15 19:31:12 +0300 |
commit | 97bbb430e4f1460858b2f1baaffc2ef804c63086 (patch) | |
tree | 4cbf88a77e471c6c21ea7935d6a54f71c72728e3 /src | |
parent | 0cdd25d921202030745069dbccd16ef856e16750 (diff) | |
download | suem-97bbb430e4f1460858b2f1baaffc2ef804c63086.tar suem-97bbb430e4f1460858b2f1baaffc2ef804c63086.tar.xz suem-97bbb430e4f1460858b2f1baaffc2ef804c63086.zip |
New style of command dispatcher! =)
Diffstat (limited to 'src')
-rw-r--r-- | src/Commands.hs | 50 | ||||
-rw-r--r-- | src/Suem.hs | 41 | ||||
-rw-r--r-- | src/Utils.hs | 32 |
3 files changed, 92 insertions, 31 deletions
diff --git a/src/Commands.hs b/src/Commands.hs index 1413c87..6d99b00 100644 --- a/src/Commands.hs +++ b/src/Commands.hs @@ -2,6 +2,7 @@ module Commands where import Control.Lens import Machine +import Utils doNothing :: Machine -> Machine doNothing m = Machine (Registers (pc r + 2) (sr r) (drs r) @@ -9,15 +10,15 @@ doNothing m = Machine (Registers (pc r + 2) (sr r) (drs r) (ram m) (rom m) where r = regs m -doUnlink :: Int -> Machine -> Machine -doUnlink 7 m = let r = regs m in if isSupervisor m +_doUnlink :: Int -> Machine -> Machine +_doUnlink 7 m = let r = regs m in if isSupervisor m then Machine (Registers (pc r + 2) (sr r) (drs r) (ars r) (usp r) (getLong m (fromIntegral $ ssp r) + 4)) (ram m) (rom m) else Machine (Registers (pc r + 2) (sr r) (drs r) (ars r) (getLong m (fromIntegral $ usp r) + 4) (ssp r)) (ram m) (rom m) -doUnlink a m = let +_doUnlink a m = let r = regs m av = getLong m (fromIntegral (ars r !! a)) newars = ars r & element (fromIntegral a) .~ av @@ -28,3 +29,46 @@ doUnlink a m = let else Machine (Registers (pc r + 2) (sr r) (drs r) newars (av + 4) (ssp r)) (ram m) (rom m) +doUnlink :: [Int] -> Machine -> Machine +doUnlink = _doUnlink . fromBits + +doReset :: Machine -> Machine +doReset = id + +doStop :: Machine -> Machine +doStop = id + +doRTE :: Machine -> Machine +doRTE = id + +doRTS :: Machine -> Machine +doRTS = id + +doTrapV :: Machine -> Machine +doTrapV = id + +doRTR :: Machine -> Machine +doRTR = id + +doIllegal :: Machine -> Machine +doIllegal = id + +_doTAS :: Int -> Int -> Machine -> Machine +_doTAS _ _ = id +doTAS :: [Int] -> [Int] -> Machine -> Machine +doTAS = args2 _doTAS + +_doTST :: Int -> Int -> Int -> Machine -> Machine +_doTST _ _ _ = id +doTST :: [Int] -> [Int] -> [Int] -> Machine -> Machine +doTST = args3 _doTST + +_doTrap :: Int -> Machine -> Machine +_doTrap _ = id +doTrap :: [Int] -> Machine -> Machine +doTrap = _doTrap . fromBits + +_doLink :: Int -> Machine -> Machine +_doLink _ = id +doLink :: [Int] -> Machine -> Machine +doLink = _doLink . fromBits diff --git a/src/Suem.hs b/src/Suem.hs index 3ca635b..fe73a1e 100644 --- a/src/Suem.hs +++ b/src/Suem.hs @@ -3,9 +3,9 @@ module Suem (Config(..), ConfigSocket(..), suem) where import qualified Data.Vector.Unboxed as V import qualified Data.ByteString as B import Data.Word -import Data.Bits import Machine import Commands +import Utils data ConfigSocket = ConfigInet String | ConfigUnix String @@ -22,35 +22,20 @@ data Config = Config Int -- frequence (Maybe ConfigSocket) (Maybe ConfigSocket) -boolToInt :: Bool -> Int -boolToInt True = 1 -boolToInt False = 0 - -toBits :: Word16 -> [Int] -toBits x = map (boolToInt . testBit x) [0..(finiteBitSize x-1)] - -fromBits :: [Int] -> Int -fromBits = foldl (\a b -> 2 * a + b) 0 . reverse - doCommand :: [Int] -> Machine -> Machine ---doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,0,0] = doReset +doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,0,0] = doReset doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,0,1] = doNothing ---doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,1,0] = doStop ---doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,1,1] = doRTE ---doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,1,0,1] = doRTS ---doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,1,1,0] = doTrapV ---doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,1,1,1] = doRTR ---doCommand [0,1,0,0,1,0,1,0, 1,1,1,1,1,1,0,0] = doIllegal ---doCommand [0,1,0,0,1,0,1,0, 1,1,a,b,c,d,e,f] = --- doTAS (fromBits [a,b,c]) (fromBits [d,e,f]) ---doCommand [0,1,0,0,1,0,1,0, a,b,c,d,e,f,g,h] = --- doTST (fromBits [a,b]) (fromBits [c,d,e]) (fromBits [f,g,h]) ---doCommand [0,1,0,0,1,0,1,0, 0,1,0,0,a,b,c,d] = --- doTrap (fromBits [a,b,c,d]) ---doCommand [0,1,0,0,1,0,1,0, 0,1,0,1,0,a,b,c] = --- doLink (fromBits [a,b,c]) -doCommand [0,1,0,0,1,0,1,0, 0,1,0,1,1,a,b,c] = - doUnlink (fromBits [a,b,c]) +doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,1,0] = doStop +doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,0,1,1] = doRTE +doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,1,0,1] = doRTS +doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,1,1,0] = doTrapV +doCommand [0,1,0,0,1,1,1,0, 0,1,1,0,0,1,1,1] = doRTR +doCommand [0,1,0,0,1,0,1,0, 1,1,1,1,1,1,0,0] = doIllegal +doCommand [0,1,0,0,1,0,1,0, 1,1,a,b,c,d,e,f] = doTAS [a,b,c] [d,e,f] +doCommand [0,1,0,0,1,0,1,0, 0,1,0,0,a,b,c,d] = doTrap [a,b,c,d] +doCommand [0,1,0,0,1,0,1,0, 0,1,0,1,0,a,b,c] = doLink [a,b,c] +doCommand [0,1,0,0,1,0,1,0, 0,1,0,1,1,a,b,c] = doUnlink [a,b,c] +doCommand [0,1,0,0,1,0,1,0, a,b,c,d,e,f,g,h] = doTST [a,b] [c,d,e] [f,g,h] doCommand _ = error "Bad command." runMachine :: Machine -> IO () diff --git a/src/Utils.hs b/src/Utils.hs new file mode 100644 index 0000000..345b085 --- /dev/null +++ b/src/Utils.hs @@ -0,0 +1,32 @@ +module Utils where + +import Data.Word +import Data.Bits +import Machine + +boolToInt :: Bool -> Int +boolToInt True = 1 +boolToInt False = 0 + +toBits :: Word16 -> [Int] +toBits x = map (boolToInt . testBit x) [0..(finiteBitSize x-1)] + +fromBits :: [Int] -> Int +fromBits = foldl (\a b -> 2 * a + b) 0 . reverse + +args2 :: (Int -> Int -> Machine -> Machine) -> + [Int] -> [Int] -> Machine -> Machine +args2 f a b = f (fromBits a) (fromBits b) + +args3 :: (Int -> Int -> Int -> Machine -> Machine) -> + [Int] -> [Int] -> [Int] -> Machine -> Machine +args3 f a b c = f (fromBits a) (fromBits b) (fromBits c) + +args4 :: (Int -> Int -> Int -> Int -> Machine -> Machine) -> + [Int] -> [Int] -> [Int] -> [Int] -> Machine -> Machine +args4 f a b c d = f (fromBits a) (fromBits b) (fromBits c) (fromBits d) + +args5 :: (Int -> Int -> Int -> Int -> Int -> Machine -> Machine) -> + [Int] -> [Int] -> [Int] -> [Int] -> [Int] -> Machine -> Machine +args5 f a b c d e = f (fromBits a) (fromBits b) (fromBits c) + (fromBits d) (fromBits e) |